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AS1322
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9.1 Output Voltage Ripple
The AS1322 is designed to work at high efficiency. In order to reduce the output ripple the following improvements are recommended:
Use a higher output capacitor, up to 44μF and a higher input capacitor (22μF).
Use smaller values for the resistor divider. R1 should be about 300k ? . To avoid a high leakage current from pin VOUT through the resistor
divider to GND, R1 should not be less than 100k ? .
To reduce the output ripple it’s also possible to speed up the feedback loop. To achieve this, place a 22pF (C4 in Figure 20 ) capacitor in
parallel to R1. Via C4 the fast transients are shorted to the FB pin and the feedback loop is even faster. A 1M ? resistor for R1 slows down
the FB loop.
Due to noise and to their non linear behavior, the use of potentiometers is not recommended.
Figure 20. AS1322 - Typical Application for lower Output Voltage Ripple
L1
4.7μH
1
SW
2xAA Battery
6
5
V OUT = 2.8V
C 1
22μF
VIN
AS1322
VOUT
C 4
22pF
R 1
250k ?
C 2
22μF
C 3
22μF
On
4
3
Off
SHDNN
2
GND
FB
R 2
196k ?
Note: For correct measurements of the output ripple connect the oscilloscope probe as close as possible to the positive plate of the C OUT
and connect the GND of the oscilloscope probe to the negative plate of the C OUT . This will reduce the inductive coupling and will
deliver a more accurate measurement result.
The output ripple is getting higher as V IN is getting closer to V OUT . Figure 21 shows that the above mentioned improvements reduce the output
voltage ripple. If V IN is higher than V OUT the AS1322 stops switching and V IN is connected to V OUT via the inductor and the internal P-FET.
Figure 21. Output Voltage Ripple vs. Input Voltage; V OUT = 2.8V, I OUT = 0.8mA
125
Cout = 44μF
Cout = 66μF
100
75
50
25
0
Cout = 44μF + C4 = 22pF
0.5
1
1.5
2
2.5
3
3.5
Input Voltage (V)
www.ams.com/DC-DC_Step-Up/AS1322
Revision 1.10
11 - 18
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